Pulse Width Modulation (PWM) is a technique widely used in modern switching circuit to control the amount of power given to the electrical device.A pulse width modulation is a modulation technique that uses a digital signal to create varible analog signal.The average amount of energy received by the electrical device is corresponding to the ON and OFF period (duty cycle); therefore by varying the ON period i.e. longer or shorter, we could easily control the amount of energy received by the electrical device.
The Duty Cycle of a PWM Waveform is given by
we have two compare output mode of operation
1>Inverted Mode-if the waveform value is greater than the compare level, then the output is set high else the output is low.the signal will jump up to 5v (start of the pulse) when the timer/counter hits the OCR (Output Compare Register) value.
2>Non-Inverted Mode-non-Inverted PWM is, of course, the opposite the Output Compare Pin is CLEARED when the timer reaches the TOP value and low otherwise.the signal starts at 5v and jumps down to 0v when the timer/counter hits the OCR value.
PWM modes of operation
1>fast PWM 2>phase correct pwm
compare match output mode
Wave generation mode
Fast PWM
in fast PWM we have got a sawtooth waveform,we compare it with a fixed voltage level and get a PWM output .the register TCNTn counts from bottom value to maximum value and its value resets to zero.you can see, the pulse width has reduced, so the duty cycle.
Output frequency= Crystal frequency ÷ (Prescaler ×255)KHz
Code
/*
* fast_pwm.c
*
* Created: 10/4/2014 10:27:55 AM
* Author: rohit
*/
#include<avr/io.h>
#include<util/delay.h>
#define duty_cycle 50 // duty cycle
void fastpwm_int();
int main()
{
unsigned int OCR_value;
fastpwm_int();
OCR_value=(duty_cycle*256)/100;
while(1)
{
OCR0 = OCR_value;
}
}
void fastpwm_int() // initialization for fast PWM signal using timer0
{
TCCR0 |= (1<<WGM00)|(1<<COM01)|(1<<WGM01)|(1<<CS00);
DDRB |= (1<<PB3);// OC0 pin (pin PB3 for atmega32) as output pin
}
VIDEO
Phase correct PWM
in phase correct mode instead of a sawtooth waveform, we have a triangular waveform. TCNTn counts from bottom value to maximum value and maximum value to bottom value. The OCRn register compares the value with the TCNTn register constantly during up-counting and down-counting.unlike fast pwm increasing the compare voltage level, the duty cycle reduces in phase correct mode we don't need to face such problem.
Output frequency= Crystal frequency÷(Prescaler ×510)KHz
Code
/*
* phasecorrect_pwm.c
*
* Created: 10/4/2014 11:21:07 AM
* Author: rohit
*/
#include <avr/io.h>
#include <util/delay.h>
#define duty_cycle 20 // duty cycle
void pwm_init()
{
TCCR0 |= (1<<COM01)|(1<<WGM00)|(1<<CS00);// initialization for phase correct PWM using timer0
DDRB |= (1<<PB3);//OC0 pin (pin PB3 for atmega32) as output pin
}
int main()
{
unsigned int OCR_value;
pwm_init();
OCR_value=(duty_cycle*256)/100;
while(1)
{
OCR0 =OCR_value;
}
}
VIDEO
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