Interrupts are basically events that require immediate attention by the microcontroller. When an interrupt event occurs the microcontroller pause its current task and attend to the interrupt by executing an Interrupt Service Routine (ISR) at the end of the ISR the microcontroller returns to the task it had pause and continue its normal operations. In order for the microcontroller to respond to an interrupt event the interrupt feature of the microcontroller must be enabled along with the specific interrupt. This is done by setting the Global Interrupt Enabled bit and the Interrupt Enable bit of the specific interrupt.

Interrupt Service Routine or Interrupt Handler

An Interrupt Service Routine (ISR) or Interrupt Handler is a piece of code that should be execute when an interrupt is triggered. Usually each enabled interrupt has its own ISR. In AVR assembly language each ISR must end with the RETI instruction which indicates the end of the ISR.

Interrupt Flags and Enabled bits

Each interrupt is associated with two (2) bits, an Interrupt Flag Bit and an Interrupt Enabled Bit. These bits are located in the I/O registers associated with the specific interrupt:

  • The interrupt flag bit is set whenever the interrupt event occur, whether or not the interrupt is enabled.
  • The interrupt enabled bit is used to enable or disable a specific interrupt. Basically is tells the microcontroller whether or not it should respond to the interrupt if it is triggered.

In summary basically both the Interrupt Flag and the Interrupt Enabled are required for an interrupt request to be generated as shown in the figure below.

Global Interrupt Enabled Bit

Apart from the enabled bits for the specific interrupts the global interrupt enabled bit must be enabled for interrupts to be activated in the microcontoller. For the AVR 8-bits microcontroller this bit is located in the Status I/O Register (SREG). The Global Interrupt Enabled is bit 7, the I bit, in the SREG.

Interrupt provided with the AVR microcontroller

The AVR 8-bits microcontroller provide both internal and external interrupt sources. The internal interrupts are associated with the microcontroller's peripherals. That is the Timer/Counter, Analog Comparator, etc. The external interrupts are triggered via external pins. The figure below shows the pins, on which the external interrupts can be triggered, for an AVR 8-bit microcontroller. On this microcontroller there are four (4) external interrupts:

The RESET interrupt - Triggered from pin 9.

External Interrupt 0 (INT0) - Triggered from pin 16.

External Interrupt 1 (INT1) - Triggered from pin 17.

External Interrupt 2 (INT2) - Triggered from pin 3.

When writing assembly codes for your AVR microcontroller utilizing the interrupt feature the following MUST be observed:

  • The interrupt MUST be enabled by setting its enabled bit in the appropriate I/O register.
  • The Global Interrupt bit, the I bit, in the microcontroller's status register (SREG) MUST also be enabled.
  • The stack MUST be initialized. When an interrupt is being service the microcontroller need to store critical information on the stack and so it must be initialized.
  • The Interrupt Service Routine (ISR) MUST end with the RETI instruction, which indicates the end of the ISR. The microcontroller needs to know when it reaches the end of the ISR so it can return to its previous task.

ATMega8515 Interrupt Vector Table


To program an interrupt, the user is responsible for the following actions:

• Ensure the ISR for a specific interrupt is tied to the correct interrupt vector address, which

points to the starting address of the ISR.

Ensure the interrupt system has been globally enabled. This is accomplished with the

assembly language instruction SEI.

• Ensure the specific interrupt subsystem has been locally enabled.

• Ensure the registers associated with the specific interrupt have been configured correctly.

 Programming Timer Interrupts 

A timer (also called as counter) is simply a device that counts upon receiving clock pulses. The timer increments (or decrements in certain cases)its count with each clock tick it receives.  A timer is usually specified by the maximum value to which it can count (called MAX) beyond which it overflows and resets to zero(BOTTOM). Thus an 8-bit timer/counter can count from 0 through 255 and a 16-bit timer/counter can count from 0 through 65,535. The speed of counting can be controlled by varying the speed of clock input to it. This is done by prescaling the clock of the microcontroller. By prescaling, we feed a fraction of the CPU clock to the timer.

Timer speed =F_CPU / prescaler

where F_CPU is the AVR CPU clock speed.Normal prescaler values are 1,8,64,256 and 1024. For example, for a 1MHZ clock, if prescaler is 64, then timer speed is  1000000/64=15625 i.e.  in one second,  the timer can count from 0 to 15625. When the timer reaches the maximum value it can count, it is said to overflow and it automatically resets to 0 and starts counting again. We can set an interrupt to occur when the timer overflows.

Timers and interrupts

AVR timers can generate 3 types of interrupts- Overflow, Compare match and Input Capture (Input capture is a mode in which we can have the value of the  TCNT register  copied to the ICR register whenever  a rising/falling edge is found on the ICP1 pin of the ATMEGA) and we can execute a user specified ISR for these as demonstrated.

To enable interrupts, first we have to enable compare match interrupt for  timer 1 by setting OCIE1A (Output Compare A Match Interrupt Enable) bit in theTIMSK register and then we have to enable global interrupts with the sei() macro. For handling overflow interrupts, set TOIE1 bit in TIMSK register to 1.


Programming External Interrupts 

Configuration Registers:

To configure an external interrupt INT0, INT1 or INT2,it is required to initialize the respective interrupt by doing appropriate bit settings of following 4 registers. The scope of this document is limited to the explanation of the bits corresponding to interrupts only, the detailed description about other bits of these register can be found in the datasheet of Atmega16.

1.      MCUCR (MCU Control register)


The Bit0, Bit1, Bit2 and Bit3 of MCUCR register determines the nature of signal at which the interrupt 0 (INT0) and interrupt 1 (INT1) should occur.

 2.      MCUCSR (MCU Control and Status Register)

The Bit6 of MCUCSR register determines the nature of signal at which the external interrupt 2 (INT2) should occur. INT2 is edge triggered only, it cannot be used for level triggering like INT0 and INT1. 

3.      GICR (General Interrupt Control Register)

 The GICR register Bit5, Bit6 and Bit7 called the interrupt masks are used to disable/enable the respective interrupt. Interrupt is disabled when bit value is set to 0 and enabled when bit value is set to 1. By default all the interrupts are disabled. Above mentioned three registers have to be configured accordingly to initialize a particular  interrupt. Also note that in addition to the above mentioned registers,  the I-bit (Bit7, Global Interrupt Enable) of SREG register must also be set to 1. If Global Interrupt enable bit is set to 0, none of the interrupts will work  irrespective of the other register settings. The set and clear of I-bit is done by SEI and CLI instructions.




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